Power consumption and operating frequency are two important considerations in the design and operation of very large scale integration (VLSI) devices. It is known that power consumption is dependent on both a supply voltage and operating frequency. The basic relationship for power consumption for an integrated circuit (IC) chip can be expressed as follows:P=C×V2×F  EQ.1
where P=power,                C=switching capacitance,        V=supply voltage, and        F=operating frequency.From Eq. 1, it is shown that power consumption varies at least quadratically as a function of the supply voltage. For instance, about a 10% increase in supply voltage results in about a 21% increase in power. However, where frequency is further dependent on the supply voltage, such as for a voltage controlled oscillator, the relationship between power consumption and voltage is approximately cubic.        
Process variations associated with fabrication of IC chips can cause a significant performance degradation associated with one or more of the power-related parameters. In general, process variations can include lot-to-lot variations, wafer-to-wafer variations, die-to-die variations and within-die variations. Significantly, with the continued scaling of VLSI chips, including those employing CMOS and Bipolar-CMOS technologies, process variations can have a significant impact on the supply voltage as well as the operating frequency of the chip.